I am Yamini Parthasarathy. I have strong passion towards Digital VLSI concentrating on Physical Design (P&R,STA,Low power techniques and concepts), VLSI(CMOS concepts).I did my Physical Design training with Gigascale Design System (Bengaluru,India) for 4-5 months post which I joined as a Physical Design Intern at Cadence Design System,Bengaluru. I worked as a Physical Design Engineer for close to 2 years.

I moved to USA for my Masters in Electrical Engineering (Major: Computing systems) at University of Texas at Dallas. I interned with Qualcomm Inc during my Summer 2018. I have worked on different technology nodes (7nm, 16nm,28nm, 130nm,180nm). I have good knowledge on the Industry’s latest tools and scripting languages. I would like to share my knowledge through this blog.

The main motive of this blog is to create awareness within students for VLSI/Semiconductor industry.